System Integration Testing is a testing process that shakes down source code developed and fixes any variance before proceeding to the next testing phase. To complete (or exit) SIT, there must be fewer variances than can be tolerated.
SIT is similar to Unit Test.
Interconnect Stress Test (IST) is an accelerated stress test method used to evaluate the integrity of the Printed Circuit Board (PCB) interconnect structure. It's an objective test whose results are timely, repeatable, reproducible and unique.
